1. Field of the Invention
The present invention relates to a PLL (Phase-Locked Loop) circuit, a communication apparatus equipped with a PLL circuit, and a frequency adjustment method.
2. Description of the Related Art
A PLL synthesizer module used in a communication apparatus has a circuit configuration composed of a VCO (Voltage-Controlled Oscillator), a loop filter circuit, a PLL IC including a charge pump circuit and a phase comparator.
FIG. 1 is a flowchart of a conventional frequency trimming method for the voltage-controlled oscillator. First, a supply of power to the VCO is started at step S101, and a supply of power to the PLL IC is started at step S102. Next, an instruction signal that indicates a target frequency to be set is written into the PLL IC at step S103. If it is determined, at step S105, whether the VCO deviates from the target frequency at step S105 after the PLL loop is in the locked state (in-phase state) at step S104. If the VCO does not oscillate at the target frequency, the frequency is adjusted by trimming a capacitance element or an inductance element, which elements form the resonance circuit of the VCO. It is to be noted that the frequency adjustment mentioned above is carried out while the PLL IC is working.
However, the conventional trimming-based frequency adjustment needs a long time to set the PLL circuit at the target frequency because the PLL IC is being activated until the target frequency is obtained by applying the control voltage to the frequency control terminal of the VCO through the charge pump circuit. It is therefore difficult to shorten the time it takes to perform the step of trimming. Further, the trimming-based frequency adjustment needs several instruments such as a frequency measurement device, a power supply, and a circuit generating a digital signal used as the input signal to control the PLL IC.
FIG. 2 is a circuit diagram of a PLL circuit described in Japanese Patent Application Publication No. 2000-183733. Referring to FIG. 2, a PLL circuit 10 includes a voltage-controlled oscillator 2 equipped with a trimming area 2c serving as an oscillation frequency adjusting mechanism and a control voltage terminal 2d, a charge pump 7, a loop filter 8, an oscillator 3, frequency dividers 4 and 5 and a phase comparator 6. The output of the charge pump 7 is connected to the control voltage terminal 2d via the loop filter 8. Any of voltage applying means 11a through 11e are provided in the route from the output terminal of the charge pump 7 to the control voltage terminal 2d via the loop filter 8. The voltage applying means 11a through 11e apply a predictable dc voltage to the control voltage terminal 2d. Then, the oscillation frequency of the voltage-controlled oscillator 2 is adjusted by using the trimming area 2c. It is therefore possible to rapidly adjust the oscillation frequency of the voltage-controlled oscillator 2 in the PLL circuit 10 without operating the entire PLL circuit 10.
However, this adjustment method is liable to be affected by noise superimposed on the power supply. In order to reduce the influence of this noise and precisely control the VCO at the target frequency, it is necessary to apply a control voltage to a signal line between the charge pump and the voltage-controlled oscillator, particularly at a point close to the side of the charge pump. The position at which the control voltage is applied is thus limited.